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ESD3V3U4ULC
Ultra-low Capacitance ESD / Transient Protection Array
1
1.1
Ultra-low Capacitance ESD / Transient Protection Array
Features
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ESD / transient protection of high speed data lines exceeding :
– IEC61000-4-2 (ESD) : ±20 kV (air/contact)
– IEC61000-4-4 (EFT) : 2.5 kV (5/50ns)
– IEC61000-4-5 (Surge) : 3 A (8/20 μ s)
Maximum working voltage: V RWM = 3.3 V
Ultra low capacitance C L = 0.4 pF I/O to GND (typical)
Very low clamping voltage: V CL = 8 V at I PP = 16 A (typical)
Very low dynamic resistance: R DYN = 0.19 ? (typical)
TSLP-9-1 package with pad pitch 0.5 mm, optimized pad design to simplify PCB layout
Pb-free and halogen free package (RoHS compliant)
1.2
Application Examples
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2
USB 3.0, 10/100/1000 Ethernet, Firewire
DVI, HDMI, S-ATA, DisplayPort
Mobile HDMI Link, MDDI, MIPI, etc.
Product Description
Pin 9
Pin 8
Pin 7
Pin 6
Pin 1
Pin 2
Pin 4
Pin 5
I/O
I/O
I/O
I/O
GND
Pin 1
Pin 2
Pin 3
Pin 4
Pin 5
Pin 3
a) Pin configuration
b) Schematic diagram
Figure 1
Table 1
Pin Configuration and Schematic Diagram
Ordering Information
Type
ESD3V3U4ULC
Final Data Sheet
Package
TSLP-9-1
Configuration
4 lines, uni-directional
4
Marking code
Z2
Rev. 1.2, 2012-07-03
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